Shadowing-Übung: A Brief History of Semiconductor Packaging - Englisch Sprechen Lernen mit Video
Übungsmodus wählen
Jeder Modus öffnet einen Übungsraum im Vollbild.
215 Sätze
Wenn Sätze zu kurz oder zu lang sind, klicke auf Edit, um sie anzupassen.
1
In this video, we're going to look at a brief history of the semiconductor packaging industry.
2
Packaging refers to the integrated circuits, carrier, and enclosure.
3
It protects the silicon dye inside from physical damage while also allowing it to be connected to other devices.
4
The industry has long been chopped liver, overshadowed by the sexier work of wafer fabrication.
5
But it's important and we should know about it.
6
Let's go.
7
But first, let me talk about the Asianometry Patreon.
8
Early Access members see new videos and selected references for them before the release of the public.
9
It helps support the videos and I appreciate every pledge.
10
Thanks, and on with the show.
11
ICs are precious little snowflakes.
12
They need protection from the real world, which is full of damaging influences.
13
Particles can get in and interfere with operations.
14
Moisture in the air can cause their metals to corrode.
15
High temperatures generated during operations can cause the IC to degrade or even fail outright.
16
Vibrations or jolts can damage the chip's capabilities.
17
And so on.
18
The packaging is for protecting from all of these threats.
19
Let's talk about what's inside.
20
First, we have your die.
21
The die attaches to a metal support called a lead frame.
22
Oftentimes through the use of clips, adhesive or straps.
23
The lead frame has wires attached to it which connected to the outside world.
24
These are called bond wires.
25
And then finally, there is a plastic or ceramic or metal enclosure surrounding the die, the lead frame, and the bond wires.
26
This whole setup is considered by the industry as only the first level of semiconductor packaging.
27
The second level refers to the circuit board, and the third and final level refers to the system's final enclosure, like the desktop PC's chassis.
28
The process of encasing the fabricated die into its level 1 package is referred to as the back -end.
29
We can further break down back -end processes to two major steps, assembly and test.
30
Processes differ based on the technology, but here is the vanilla workflow.
31
In assembly, we start by cutting the dies out of the completed wafer and inspecting them.
32
After this, we have to put the dies onto the package's lead frame, called die attach or die bonding or die mounting.
33
Then we attach the very small bond wires to the dies which allow the chip to communicate with the outside world.
34
This step is called wire bonding and was pioneered by Bell Labs in the 1950s.
35
After that, we put the die into its ceramic or plastic package to protect it from the outside world.
36
At the start, this process had to be done manually, making it one of the first things to be outsourced abroad.
37
Since then, machines have taken over and a swath of new bonding techniques have been introduced.
38
Discussing them is beyond the scope of this video, but you should know they exist.
39
Throughout its history, packaging's goals have stayed rather consistent.
40
Help the IC achieve its full functionality and don't get in its way, be as small as possible, and be as cost -effective as possible.
41
In the beginning, only military or aerospace companies used semiconductors.
42
Price was less of a concern than total reliability.
43
Ergo, most semiconductor manufacturers packaged their dies in hermetically sealed cans made out of ceramic or steel.
44
This prevented any contaminants from messing with the chip, but there were serious drawbacks.
45
Ceramics and metal cost a lot.
46
They were also heavy, which meant that the circuit boards they were attached to had to support all that weight.
47
This made them heavy, too.
48
Packaging took a big leap forward with, who else, Fairchild Semiconductor.
49
When Fairchild started producing their revolutionary planar ICs in the late 1950s,
50
they packed them in the same TO5 and flat pack packages they used for transistors, just with a few more leads.
51
We will talk about flat packs a little later in this video.
52
But first, let us talk about the TO5.
53
The TO stands for Transistor Outline.
54
A TO5 kind of looks like a squid.
55
Basically a metal can and metal lid.
56
Fairchild's first micrologic chips were accordingly etched in a round shape.
57
But the TO5's awkward round shape made it difficult to attach onto and arrange on a board, adding to the labor cost.
58
Worse yet, TO5's limited how much data the chip can take in and push out.
59
They maxed out at just 8 -10 pins.
60
Fairchild's new logic circuits needed far more than that.
61
To5 packaging diluted the IC's advantages and worsened its disadvantages.
62
With this situation, how were ICs ever going to get to price parity with germanium devices and vacuum tubes?
63
In response, Fairchild developed two new packaging techniques.
64
The first was plastic encapsulation.
65
It sounds fancy, but the way they did it back then was to put the IC die on a ceramic bead
66
and cover the whole thing with a plastic blob.
67
This method had some issues.
68
Plastic can be permeable to certain chemicals, leading to concern surrounding contamination.
69
And plastic can shrink or grow, depending on outside conditions like heat, inflicting mechanical stress on the chips inside.
70
However, plopping plastic onto a chip required very little skill.
71
This meant that Fairchild could outsource his assembly work to cheap manual labor in Hong Kong or South Korea.
72
One of the first such electronics companies to do so.
73
Fairchild's second idea would forever change semiconductor packaging.
74
Fairchild's digital systems laboratory head, Rex Rice, created a new lead configuration for an IC.
75
The leads were spaced about one hundred thousandths of an inch apart.
76
The industry term for this measurement is lead pitch and came out in a single line.
77
You would attach the package to the circuit board using what is called through -hole mounting.
78
Here, you insert the package's leads through literal holes drilled into the boards.
79
The holes have large round solder contact areas surrounding them.
80
After insertion, you solder the leads on the backside to secure them.
81
The method for doing this was called wave soldering.
82
Tests found that this new inline packaging system fit all the criteria.
83
It can accommodate more I .O some 12 to 16 pins at the start.
84
It simplified the circuit board layout.
85
And finally, it took less time and skill to assemble.
86
The inline arrangement was far simpler than the TO5CAN's circle -shaped leads.
87
Before deploying the product, Fairchild first consulted with customers and end users who did not like the single line arrangement.
88
However, they would be okay with two lines.
89
So Fairchild revised the prototype to two rows of inline pins.
90
Dual inline packaging or DIP.
91
Introduced in 1965, the simplicity of dual inline packaging cut the cost of assembly by a factor of four.
92
The industry widely adopted it throughout the 1970s and 80s.
93
During those 20 years, DIPs held some 80 -90 % market share when measured by value.
94
However, as the industry moved into the 1970s and the era of very large -scale integration or VLSI, demands for I -O density kept growing.
95
Some VLSI chips would require as many as 300 leads.
96
More leads forced the DIPs to grow increasingly large.
97
DIPs can have 64 or even more leads, but doing so gave them impractically large board footprints.
98
If trends continued the way they were, the DIP packages would end up being far larger than the dyes themselves.
99
This invalidates the various miniaturization gains in semiconductor manufacturing.
100
In response to this trend, a series of new packages capable of accommodating far more leads emerged.
101
The packaging industry's second big revolution.
102
This generation of packages was defined not by their shape, but rather how they were attached to the circuit board.
103
Surface mounting technology describes a style of mounting packages onto the board using flat patches of solder already on the board.
104
Surface mounting had several advantages over through -hole mounting.
105
First, because through -hole mounting required you to solder the back side of the boards to secure the DIPs,
106
you can only use one side of the board.
107
With surface mounting, you can use both.
108
This alone increases the theoretical number of packages on a single board by 35 -60%.
109
Second, it allowed us to move the leads closer together.
110
Or in other words, for a smaller lead pitch.
111
This is because you no longer have the solder contact areas around the holes.
112
And third, you can use cheaper boards.
113
Drilling a hole into a board costs money.
114
And there can be up to a thousand holes on a standard board.
115
Contemporary estimates found that a surface mount board costs $0 .13 per square inch, while an insertion hole mounting board costs $0 .15.
116
Furthermore, the boards aren't peppered with holes anymore, which means they don't need so many layers to maintain their structural integrity.
117
Another cost -saving measure.
118
Previously all that surface mounting had to be done by hand.
119
Which, considering the smaller lead pitches, required a great deal of skill and training.
120
This was the primary reason why surface mounting didn't take off at first.
121
New automatic machines finally closed the loop on this.
122
Manufacturers now use convection heating, hot gas or even infrared heat rays to solder the packages onto the boards.
123
Basically ovens.
124
The origins of modern surface mounting technology are murky.
125
And there isn't one significant inventor or eureka moment.
126
I mean, the concept of attaching stuff to a board is not exactly groundbreaking.
127
The earliest credible mention is a British patent filed in 1960.
128
It describes resistors, coils, and such attached to a printed board using an adhesive.
129
The connectors were connected using solder.
130
Early adopters in the 1960s included the US military, which used flatpacks for their missile guidance computers.
131
The flatpak was a stackable rectangular glass and ceramic package that was surface mounted onto a board.
132
The flat pack was invented in 1962 by Yong Tao of Texas Instruments.
133
So actually a few years older than the venerable DIP.
134
I couldn't find much more about inventor Yong Tao or his life, which is unfortunate.
135
In the late 1960s, the Swiss watch industry adopted surface mounting as a way to reduce the number of electronics in their watches.
136
They popularized what is called the Small Outline integrated circuit, sometimes also known as the Swiss outline.
137
The small outline looks like the DIP and is made from the same molded plastic materials.
138
However, it is far smaller.
139
A third as high and half as long.
140
This was because its 28 gull -wing leads are spaced far closer together.
141
Possible again because we are directly mounting these onto the board.
142
They are called gull -wing leads because their shape is somewhat reminiscent of seagull's wings.
143
Seagulls are birds that steal your hot dogs at the beach.
144
In the 1970s, the Japanese electronics industry began adopting surface mounting technology for their car radios, TV tuners, and TV cameras.
145
It is likely they got the idea from Europe, Germany, or Britain perhaps.
146
By the 1978 and 1980 period,
147
the semiconductor packaging industry had started moving towards surface mounting with numerous published articles discussing its use for increasing packing density. In the early 1980s,
148
the Japanese revived the old US military flat pack to create
149
an updated surface mount compatible version called the Quad Flat Package or QFP.
150
With the Quad Flat, we have the leads projecting down and away from all four sides of the square package.
151
Depending on their size, the quad -flat can offer anywhere from 20 to 240 leads.
152
Pitches shrank to as small as 1 or 0 .65 millimeters.
153
You can go guess how many inches that is.
154
The quad -flat quickly evolved.
155
Pushed along by consumer demands for smaller and smaller consumer electronics, the Japanese industries introduced yet smaller packages like the shrink quad flat package,
156
the very small quad flat package, and the thin quad flat package.
157
On the other end of the spectrum, new structures outpaced the quad flat on the lead count front.
158
People realized that having the leads come out of the sides meant
159
that you couldn't use the real estate underneath the package itself.
160
So for high lead count devices, the packaging industry revived an old IBM invention, the pin grid array or the PGA.
161
First introduced in 1971, the square -shaped pin grid array can handle hundreds of leads on its underside.
162
IBM invented the pin grid array for high IO uses in the computer industry.
163
Those packages were made from ceramic, which not only made them more expensive but also their circuit boards,
164
since those boards had to get thicker to handle the added weight.
165
Plastic variants were later introduced.
166
Pin grid arrays were invented before the surface mount revolution.
167
So a surface mount compatible cousin emerged in the 1980s.
168
The ball grid array.
169
With these, solder balls are used rather than pins to connect the chip to the circuit board.
170
One big disadvantage of the ball grid was that you could not easily visually inspect the solder connections underneath the package.
171
X -ray and electrical tests are often used instead, with badly soldered packages removed, reballed, and reapplied.
172
Solder ball technology appear in another packaging innovation that popularized at about the same time as the BGA, flip chip.
173
This is where the silicon die is flipped so that it faces downwards.
174
To build the interconnects, we ditch wire bonding entirely in connect using bumps and balls on the chip's pads.
175
Flip chip technology is still used today and offers several benefits.
176
First, there is more contact with a heat sink, which dissipates more heat.
177
Second, electrical signals have a shorter distance with flip chip interconnects than bond wires.
178
Starting in the 1990s, consumers started buying smaller electronics like mobile phones.
179
Smaller devices mean smaller components, chips, and packages.
180
Space became a premium in a chip package.
181
The industry measures this using what is called packaging efficiency, the ratio of the area occupied by the active device.
182
the dye.
183
In response to this, the packaging industry developed the Chipscale package, which entered the market in the mid -1990s.
184
Chipscale packaging is an evolution of the aforementioned ball grid array
185
and refers to any package where the bare dye occupies 80 % or more of the total package area.
186
Taiwanese OSAT vendors like ASE Group rose up on the back of such ultra compact packages.
187
One prominent implementation of this concept is called wafer -level packaging.
188
This is where we hook up all the die interconnects before we cut those dies out of the wafer.
189
It's not only very cost -effective, but gives you very small packages.
190
As I mentioned earlier, the advent of surface mounting technology created a new generation of packages and techniques.
191
As Moore's Law slows down, packaging technologies have seen yet another surge of investment, creating what we can call advanced packaging solutions.
192
These new packaging technologies now have a much more direct role to play in the system's overall performance.
193
Semi -analysis has a fantastic multi -part breakdown on advanced packaging that I think drops the mic on the subject.
194
Perhaps the most well -known of these are chiplets.
195
This is a variant of what are called multi -chip modules or hybrid circuits or system in packages.
196
I did a video about it previously.
197
Most prominently, AMD used them to create a disruptively great product.
198
One special area of the multi -chip worlds involves 2 .5D and 3D integration.
199
These are especially cool.
200
2 .5D integration is where we put multiple dies side -by -side on top of an interconnect substrate called a silicon interposer.
201
This silicon interposer doesn't have any logic, but is just made up of many embedded interconnects.
202
There are a few consumer products using 2 .5D integration today.
203
For instance, AMD's Radeon R9 Fury GPU first introduced in 2015.
204
As the name implies, 2 .5D is an intermediate step towards 3D packaging, stacking and connecting multiple dies.
205
We are now able to use a whole new dimension to achieve packaging efficiencies of over 100%.
206
Connecting these dies may require something more heavy than your standard wire bonds, bringing forth new concepts like the through -silicon vias or TSVs.
207
I am working on a future video on 3D integration and die stacking.
208
So keep an eye out for that, If I ever finish it.
209
The semiconductor packaging industry is truly a chaotic one.
210
There are so many different technology trees growing concurrently with one another, each branch developing and splitting for a certain significant need.
211
New technologies are built on top of those addressing particular niche applications,
212
and then suddenly before you know it you have no idea why this new thing, which you saw fail a long time ago,
213
is now such a big deal all over again.
214
In the semiconductor packaging world, ideas are created and then vanish off the mainline, only to return to the forefront when their time is right.
215
Expect more deep dives into semiconductor packaging in the near future as we familiarize ourselves with this new world.
App herunterladen
Alles, was du zum fließenden Sprechen brauchst
KI-AussprachebewertungJeder Satz bewertet
IPA-TrainingJeden Laut meistern
WortschatzBaue deinen Wortschatz auf
VokabelspielSpielend lernen
FOR YOU
Empfohlenes Video
C12
20 Sätze
The Semiconductor Production Process Explained Clearly
Daily ConversationUniversity StudentsWorking Adults
C12
28 Sätze
What is IMC (Intermetallic Compounds) part II? The different between IMC, alloy, eutectic
Daily ConversationUniversity StudentsWorking Adults
C11
282 Sätze
什麼是屏蔽罩(shielding can)？工程師對屏蔽罩的愛恨情仇
Daily ConversationUniversity StudentsWorking Adults
C11
63 Sätze
Power House Episode 2: The Future of Global Commerce: Trusted Data & Digital Supply Chains
Daily ConversationUniversity StudentsWorking Adults
C12
799 Sätze
Cell Biology | Cell Structure & Function
American AccentDaily ConversationUniversity Students
C11
27 Sätze
You are wasting memory
Daily ConversationUniversity StudentsWorking Adults
C11
9 Sätze
I2C Protocol Explained #engineering
Daily ConversationUniversity StudentsWorking Adults
C11
166 Sätze
Introduction to Optoelectronics and Photonics
Daily ConversationUniversity Students
C11
113 Sätze
Architectural Design Process Explained
Daily ConversationUniversity StudentsWorking Adults
C11
102 Sätze
Module 1: What is Supply Chain Management? (ASU-WPC-SCM) - ASU's W. P. Carey School
Daily ConversationUniversity Students
C12
12 Sätze
Plastic Injection Molding
Daily ConversationUniversity StudentsWorking Adults
C185 Sätze
Is Embedded Systems Still a Good Career in 2026?
Daily ConversationUniversity StudentsWorking Adults
Wortschatz und Sprechhinweise zu dieser Lektion
Diese Sprechübung basiert auf dem Video „A Brief History of Semiconductor Packaging“. Diese Wörter kommen am häufigsten vor: package, packaging, board, lead, die. Dieses Video enthält 215 Sätze und 2807 Wörter zum Nachsprechen. Der gesprochene Teil dauert 18:22. Der Sprecher spricht in natürlichem Tempo, etwa 153 Wörter pro Minute, ähnlich wie im Alltagsgespräch. Nur 73 % der Wörter gehören zu den 3.000 häufigsten im Englischen, der Wortschatz ist also anspruchsvoll.
Wichtiger Wortschatz in diesem Video
15 lernenswerte Wörter aus dem Video, mit Aussprache und Bedeutung:
| Wort | Aussprache | Bedeutung |
|---|---|---|
| package Substantiv | /ˈpæk.ɪd͡ʒ/ | Paket, Packung |
| mount Verb | /maʊnt/ | besteigen, ersteigen |
| chip Substantiv | /t͡ʃɪp/ | Splitter, Span |
| circuit Substantiv | /ˈsɝ.kɪt/ | Umlauf |
| semiconductor Substantiv | /ˌsɛmikənˈdʌktə/ | Halbleiter |
| wire Substantiv | /ˈwaɪɚ/ | Draht |
| grid Substantiv | /ɡɹɪd/ | Gitter, Gatter |
| ceramic Substantiv | /səˈɹæmɪk/ | Keramik |
| integration Substantiv | /ˌɪn.tɪˈɡɹeɪ.ʃən/ | Integration |
| electronics Substantiv | /ɪˌlɛkˈtɹɑ.nɪks/ | Elektronik |
| array Substantiv | /əˈɹeɪ/ | Bekleidung, Tracht |
| silicon Substantiv | /ˈsɪləˌkɑn/ | Silizium, Silicium |
| refer Verb | /ɹɪˈfɜː/ | verweisen |
| pitch Substantiv | /pɪt͡ʃ/ | Wurf |
| connect Verb | /kəˈnɛkt/ | verbinden |
Phrasal Verbs, die du hören wirst
| Wort | Bedeutung |
|---|---|
| break down Verb | versagen, den Geist aufgeben |
| end up Verb | sich herausstellen, am Ende irgendwo / etwas sein |
| hook up Verb | verkabeln, ankoppeln |
| slow down Verb | verlangsamen |
| take over Verb | übernehmen |
Grammatik in diesem Video
Die Strukturen, die der Sprecher am häufigsten verwendet, mit den genauen Worten aus dem Video:
| Struktur | Im Video |
|---|---|
| Passiv be + Partizip Perfekt – wichtig ist, was geschieht, nicht wer es tut | be connected · been chopped · are called |
| Present Perfect have/has + Partizip Perfekt – eine vergangene Handlung, die jetzt noch wichtig ist | have taken · have stayed · have seen |
| Relativsätze who / which + Satz – eine Zusatzinformation über eine Person oder Sache | world, which is · anymore, which means · life, which is |
Aussprache, auf die du achten solltest
Der Sprecher verwendet 9 Kurzformen und abgeschwächte Formen, zum Beispiel couldn't, don't, aren't. Sprich sie in der kurzen Form, so wie du sie hörst.
- Die „th“-Laute: underneath /ˌʌndɚˈniθ/, thin /ˈθɪn/, furthermore /ˈfɜː(ɹ).ðə(ɹ)ˌmɔː(ɹ)/, theoretical /ˌθi.əˈɹɛt.ɪ.kəl/
- Die Laute „sh“ und „zh“: integration /ˌɪn.tɪˈɡɹeɪ.ʃən/, enclosure /ɛnˈkloʊʒəɹ/, evolution /ˌiːvəˈluːʃ(ə)n/, efficiency /ɪˈfɪʃ.ən.si/, ratio /ˈɹeɪ.ʃoʊ/
- Lange Wörter – auf die Betonung achten: semiconductor /ˌsɛmikənˈdʌktə/, integration /ˌɪn.tɪˈɡɹeɪ.ʃən/, electronics /ɪˌlɛkˈtɹɑ.nɪks/, electrical /ɪˈlɛktɹɪkəl/, manufacturer /ˌmænjʊˈfæktʃəɹə/
Laute, die Deutschsprachigen schwerfallen:
- /w/ — mit runden Lippen, nicht wie das deutsche „w“ (/v/): wire /ˈwaɪɚ/, quad /kwɑd/, awkward /ˈɔk.wɚd/, wafer /ˈweɪ̯fɚ/
- Stimmhafter Auslaut — /b/, /d/, /g/, /z/, /v/ am Wortende nicht verhärten: package /ˈpæk.ɪd͡ʒ/, quad /kwɑd/, grid /ɡɹɪd/, surround /səˈɹaʊnd/, emerge /ɪˈmɝd͡ʒ/
- /æ/ — offener als „ä“: package /ˈpæk.ɪd͡ʒ/, ceramic /səˈɹæmɪk/, attach /əˈtæt͡ʃ/, manufacturer /ˌmænjʊˈfæktʃəɹə/, stack /stæk/
So übst du mit diesem Video
- Höre dir das ganze Video einmal an, ohne zu sprechen, und notiere die Wörter, die du nicht kennst.
- Beginne mit 0,75-facher Geschwindigkeit, sprich Satz für Satz nach und wechsle zur normalen Geschwindigkeit, sobald es leichtfällt.
- Nimm dich auf und vergleiche mit dem Original; achte dabei auf Wörter wie package, mount, chip.
Was ist die Shadowing-Technik?
Shadowing ist eine wissenschaftlich fundierte Sprachlerntechnik, die ursprünglich für die professionelle Dolmetscherausbildung entwickelt und durch den Polyglotten Dr. Alexander Arguelles populär gemacht wurde. Die Methode ist einfach aber wirkungsvoll: Du hörst englisches Audio von Muttersprachlern und wiederholst es sofort laut — wie ein Schatten, der dem Sprecher mit nur 1–2 Sekunden Verzögerung folgt. Anders als passives Hören oder Grammatikübungen zwingt Shadowing dein Gehirn und deine Mundmuskulatur, gleichzeitig echte Sprachmuster zu verarbeiten und zu reproduzieren. Studien zeigen, dass es Aussprachegenauigkeit, Intonation, Rhythmus, verbundene Sprache, Hörverständnis und Sprechflüssigkeit signifikant verbessert — was es zu einer der effektivsten Methoden für die IELTS Speaking-Vorbereitung und reale englische Kommunikation macht.